Custom Super-speed USB3.0 development board CH569 RISC-V core high-speed parallel port GPIO serdes Manufacturer

 The CH569/565 microcontroller uses the RISC-V3A core and supports the IMAC subset of RISC-V instructions. On-chip SuperSpeed USB3.0 host and device controller (built-in PHY), Gigabit Ethernet controller, dedicated high-speed SerDes controller (built-in PHY, can directly drive fiber), high-speed parallel interface HSPI, digital video interface (DVP) , SD/EMMC interface controller, encryption and decryption module, on-chip 128-bit wide DMA design can ensure high-speed transmission of large amounts of data, and can be widely used in streaming media, instant storage, super-high-speed USB3.0 FIFO, communication extension, security monitoring, etc. application scenarios.

main feature:

> RISC-V core, 120MHz system frequency, supports single-cycle multiplication and hardware division, programmable interrupt controller, low-power two-stage pipeline.

> 448KB CodeFlash, 32KB DataFlash, 16KB 32-bit wide SRAM, 32/64/96KB configurable 128-bit wide SRAM.

> Built-in super-speed USB3.0 control and transceiver (built-in PHY), support USB3.0 host/device Device mode, OTG function, support USB3.0 HUB.

> Built-in high-speed USB2.0 control and transceiver (built-in PHY), support USB2.0 host/device mode, support control/batch/interrupt/synchronous transmission.

> Built-in Gigabit Ethernet controller (Ethernet), provides RGMII and RMII PHY interface, supports 10/100/1000Mbps transmission rate.


> Built-in digital video interface DVP, configurable 8/10/12-bit data width, support YUV, RGB, JPEG compressed data. 

> Built-in high-speed parallel interface HSPI, configurable 8/16/32-bit data width, built-in FIFO, support DMA, the fastest transmission speed is about 3.8Gbps.

> Built-in SerDes control and transceiver (built-in PHY, can directly drive optical fiber), support network cable (only 1 set of differential lines) to transmit 90 meters, support 1.25Gbps high-speed differential signal communication.

> Built-in EMMC controller, support single-wire, 4-wire, 8-wire data communication mode, in line with EMMC card 4.4 and 4.5.1 specifications, compatible with 5.0 specifications.

> Support AES/SM4 algorithm, 8 combined encryption and decryption modes, support SRAM/EMMC/HSPI peripheral interface data encryption and decryption.

> 4 sets of UART, the highest baud rate is 6Mbps, compatible with 16C550, built-in FIFO, multiple trigger stages.

> 2 sets of SPI interface, support master/slave mode, built-in FIFO, support DMA

> Support AES/SM4 algorithm, 8 combined encryption and decryption modes, support SRAM/EMMC/HSPI peripheral interface data encryption and decryption.

> Active parallel port: 8-bit data, 15-bit address bus.

> 3 groups of 26-bit timers, support timing, counting, signal capture, PWM modulation output, 4 groups of extended PWM output, adjustable duty cycle

> 49 general-purpose IOs, 8 level/edge interrupts that can be set, and some pins have multiplexing and mapping functions.

> Built-in watchdog, integrated 2-wire debugging interface, support online simulation.

> Support low power consumption mode, support some GPIO, USB, Ethernet signal wake-up

> Chip ID number: unique 64bit ID identification number.

> Package: QFN68, QFN40

Version 1: CH569W-R0-1V0 (blue, green random delivery))

It is recommended to bring your own or purchase a super-speed USB3.0 data cable Type A male to male (as shown in the figure below)!